Reliability of digital circuits is very important and testing is its significant guarantee, while Automatic Test Pattern Generation(ATPG) is the major task of the test. Boolean Expression Diagrams(BEDs) is a new data structure for representing and manipulating Boolean functions or Boolean circuits and capable of representing any Boolean circuit in linear space.The properties and implementing methods of BED, which was applied to the ATPG of stuck at faults of logic circuits,was studied. In this ATPG algorithm, the XOR of the functions of the original circuit and the fault circuit was directly simplified or judged whether to be satisfiable after expressed by BED.The algorithm can sufficiently apply the simplification rules of Boolean Algebra and exploit the structural similarities between the two circuits. Experiments showed that the methods based on BEDs are less complex.
