一种基于并行GEP的复杂电路优化算法
A Complex Circuit Optimization Algorithm Based on Parallel GEP
作者：李康顺(1.江西理工大学 信息工程学院，江西 赣州 341000；2.华南农业大学 信息学院，广东 广州 510642；3.中国科学院 自动化研究所，北京 100190)；郭肇禄(江西理工大学 信息工程学院，江西 赣州 341000)；张文生(中国科学院 自动化研究所，北京 100190)
Author：Li Kangshun(1.School of Info. Eng., Jiangxi Univ. of Sci. and Technol., Ganzhou 341000,China;2.School of Info.,South China Agricultural Univ., Guangzhou 510642, China; 3.Inst. of Automation, Chinese Academy of Sciences, Beijing 100190, China)；Guo Zhaolu(School of Info. Eng., Jiangxi Univ. of Sci. and Technol., Ganzhou 341000,China)；Zhang Wensheng(Inst. of Automation, Chinese Academy of Sciences, Beijing 100190, China)
收稿日期：2008-12-31 年卷（期）页码：2010,42(1):156-161
期刊名称：工程科学与技术
Journal Name：Advanced Engineering Sciences
关键字：基因表达式程序设计；并行算法；演化硬件；优化电路
Key words：Gene Expression Programming; parallel algorithm; Evolutionary Hardware; optimization circuit
基金项目：国家973计划资助项目(2004CB318103）;国家自然科学基金资助项目(70971043）；江西省自然科学基金资助项目(2008GZS0028)
中文摘要
数字电路设计的优化是演化硬件中的研究热点，传统的优化方法主要是利用代数法和卡诺图求解法，但是在规模较大时却难于求出或无法求出最优的电路结构。提出一种新的基于并行基因表达式程序设计优化复杂数字电路的算法（COPGEP），该算法通过各子种群之间优良个体的迁移，有效地传播优良个体，充分发挥了优良个体的导向作用，提高了传统GEP的全局寻优能力以及求解精度和收敛速度。通过仿真实验表明，该算法比传统GEP收敛速度更快，能够克服传统GEP算法在优化变量个数多于5个的数字逻辑电路时收敛速度慢，甚至不收敛等缺点。
英文摘要
Optimization digital circuit is a focus of Evolutionary Hardware (EHW). A new algorithm of optimizing the complex circuit by using parallel gene expression programming (COPGEP) was proposed. In this algorithm, the better individuals were migrated among the sub-populations and the better individuals were transferred to next generation effectively. This algorithm sufficiently exerted the oriented effect of the better individuals to enhance the precision and convergent speed. The experiments showed that this algorithm had not only faster convergent speed but also could overcome more faults, compared with traditional GEP, in which the convergent speed was slow, even no convergence when the variables of logic gate circuit were more than five.
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